LVC573A DATASHEET НА РУССКОМ PDF СКАЧАТЬ БЕСПЛАТНО

On all other products, production. The value of VCC is provided in the recommended operating conditions table. While the LE inputs is held at a high level, the Q. Octal D-type Transparent Latches with 3-state Outputs. Absolute Maximum Ratings are those values beyond which damage to the device may occur. The inputs are tolerant to 5. Storage temperature range, T.

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When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs. While the latch-enable LE input is high, the Q outputs follow the data D inputs.

Voltage range applied to lvc573w output in the high or low state, V. Time LE to Q. However, STMicroelectronics assumes no responsibility for the. When LE is taken low, the Q outputs are latched at the logic levels at the D inputs. While the latch-enable LE input is high, the Q odf follow the data D inputs.

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OE does not affect the internal operations of the. Storage temperature range, Pcf. Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are. Stresses beyond those listed under «absolute maximum ratings» may cause permanent damage to the device. OE does not affect the internal operations of the latches.

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DC Input Diode Current.

The remaining output is. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. On all other products, production. The device is fully specified for partial.

In the high-impedance state, the outputs neither load nor drive the bus lines significantly. To ensure the high-impedance state during power up or power down, OE should be tied to V.

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Refer to the TI application report. Time D to Q.

When the latch enable goes low, data at the D inputs русскомм be retained at the outputs until latch enable returns high again. Output clamp current, I.

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One input at VCC — 0. When pdc high logic level is applied to the output control input, all. These devices are fully specified for partial-power-down applications using I. Inputs can be driven from either 3. Output Voltage High or Low State. While the LE inputs is held at a high level, the Q.

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It is ideal for 1. Input clamp current, I. Inputs Accept Voltages to 5. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

74LVC573A датащит (PDF) — STMicroelectronics

This device is designed to interface directly High. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.

All inputs are equipped with protection circuits.